1. Field of the Invention
The present invention relates to a chip package structure and a fabricating method thereof. More particularly, the present invention relates to a fabrication method of a multi-layered substrate and the multi-layered substrate thereof.
2. Description of Related Art
The board on chip (BOC) packaging concept, which uses a board substrate mounted above the silicon chip(s) as the lead-on-chip (LOC) technology, has been developed for high frequency applications. The BOC substrates or certain window ball grid array (BGA) substrates are essentially single-sided substrates i.e. circuit patterns and fiducials are only located on one side of the substrates. At present, rather wasteful approaches are employed to fabricate these single-sided substrates, as the dummy side of the substrates went through the similar processing steps and then removed. Therefore, not only the raw materials and processing chemicals are wasted but also the efforts spent on the dummy side become futile.
It is desirable to develop suitable manufacturing procedure for such substrate using the present manufacturing line.